Single-stage AC-DC power conversion is a low cost and thus popular power supply topology. An important parameter for a single-stage AC-DC power switching converter is its power factor, which is the ratio of the real power delivered by the AC main to the single-stage AC-DC switching power converter as compared to the apparent power delivered to the single-stage AC-DC switching power converter. The apparent power is insensitive to the phasing between the input current and voltage in contrast to the real power. The power factor is thus lowered if the input current and voltage are out of phase. The rectified input voltage to a single-stage AC-DC switching power converter cycles from approximately zero volts to the peak line voltage (e.g., 120 V*1.414 in the US) at twice the frequency for the AC main. Given this sinusoidal pulsing or cycling of the rectified input voltage, the input current should have a similar profile to achieve a high power factor such as by the use of a suitable peak current or constant on time control methodology.
Although single-stage AC-DC power conversion can thus provide a high power factor, the shaping of the input current to match the rectified input voltage cycling causes the output voltage to ripple about some nominal output value. Should the control loop in a single-stage AC-DC switching power converter have a bandwidth greater than twice the AC main frequency, it would act to suppress this output voltage ripple. But in that case, the power factor would drop as the input current would no longer have the same rectified sinusoidal profile as for the rectified input voltage. The bandwidth for the control loop in a single-stage AC-DC switching power converter must thus be less than twice the line frequency to achieve a high power factor. The resulting control loop is typically implemented using a proportional-integral (PI) controller.
The relatively slow response speed of the PI controller is problematic, however, with regard to responding to load transients. For example, the load may suddenly increase from a relatively light demand to a relatively high demand for power. Conversely, a high demand may suddenly change to a low demand of power at the load. To accommodate these transient changes, it is conventional to compare the output voltage to an upper output voltage limit as well as to a lower output voltage limit. The output voltage limits may also be denoted as output voltage thresholds. Should the output voltage feedback signal indicate that the output voltage has dipped below the lower output voltage limit or risen above the upper output voltage limit, the controller response speed is significantly increased. For example, a maximum switch on time may be used for each power switch cycle if the lower output voltage limit is crossed. Similarly, a minimum on time for the each power switch cycle may be used if the upper output voltage limit is exceeded. After the output voltage recovers so that the output voltage feedback signal lies between the upper and lower voltage limits, the low-bandwidth PI control may resume.
Although the change in control using the upper and lower voltage limit thus accommodates load transients in single-stage high PFC AC-DC power converters, the output voltage will tend to undershoot the lower output voltage limit and overshoot the upper output voltage limit. For example, the output voltage for a conventional high PFC AC-DC power converter is shown in FIG. 1 for an initial light load current followed by the sudden demand for a heavy load current. The upper and lower limits for the output voltage must provide a sufficient margin for normal operation during the heavy load period. For example, it is conventional that the margin between the peak output voltage and the upper output voltage limit be at least 5% of the nominal output voltage (the DC average for the output voltage). Similarly, it is conventional that the margin between the minimum output voltage and the lower output voltage limit be at least 5% of the nominal output voltage. During heavy load operation, the output voltage ripple itself may be 5% of the nominal output voltage. But during light load operation, the output ripple is significantly less than the 5% ripple seen during heavy load operation. The margin between the lower output voltage limit and the minimum value for Vout during low load operation will thus be significant. When Vout changes due to the application of a heavy load, Vout thus tends to undershoot the lower output voltage limit. At this point, regular PI control is stopped so that the maximum power cycles (or an increase in response gain) may be applied as discussed above. The output voltage will eventually recover, whereupon regular PI control may resume. This undershoot is problematic as the output voltage is swinging below its desired minimum value.
Accordingly, there is a need in the art for improved transient response for single-stage AC-DC power converters.